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This major multi-partner initiative, coordinated by Bull, has brought together experts in hardware design, software ecosystems, HPC, and AI to build Europe’s next generation of high-performance processors and accelerators. Its objective was to strengthen European technological sovereignty by developing — in Europe — chips designed for High‑Performance Computing. A key technical decision was to base our General‑Purpose Processor (GPP) on the Arm ISA, and to develop our accelerators around the RISC‑V ISA.

Phase 2 is a €70M project (50% EU funded), involving 28 European organisations, including key EU academics and industries, with over 200 people, and counts on several members of the Bull Research & Innovation team.

Key achievements

Design and tape‑out of the Rhea chips: a European first

  • Successful design, integration and submission to fabrication (“tape‑out”) of the Rhea processors, which will be installed in the first European Exascale Computer, Jupiter
  • These chips represent a major milestone for Europe, achieving a level of architectural and technological complexity never before realised within European-led initiatives.

First European RISC-V accelerators

  • Development and deployment of an FPGA-based Software Development Vehicle (SDV), enabling early application bring‑up, rapid software & RTL prototyping, and functional validation ahead of silicon availability. 
  • The tape-out of the second European Processor Accelerator (EPAC 1.5), showcasing several type of Risc-V based accelerators (vector, variable precision, stencil…) 
  • Progress on key IP blocks (vector processing, memory subsystems, NoC & high‑bandwidth communication interfaces).

Additional achievements:

  • Co-design and common platform definition, focusing on the integration of in-house developments and new standards
  • The explorations in power management, security management, post-quantum cryptography, and edge computing, allowing an exploitation in a broader market than the sole HPC
  • Major dissemination events: two EPI Forums (in Barcelona and Paris) and one open workshop have been organised to promote the need for sovereign technologies and disseminate our project outcomes.
Our role

Bull has been responsible for global project coordination and management since the beginning (EPI SGA1). The Bull R&D team has been involved in 17 of the 28 work packages. More specifically, the Bull R&D team helped SiPearl’s Rhea 1 definition and bring-up preparation, contributed to the EPAC chip (uncore-part), and contributed to the specifications and definitions of critical components of the solution, including power management and network management.

EPI Website
Funding Program
European High-Performance Computing Joint Undertaking (JU)
Project Duration
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